Q41GATE 2008MCQ

The block diagrams of two of half wave rectifiers are shown in the figure. The transfer characteristics of the rectifiers are also shown within the block. It is desired to make full wave rectifier using above two half-wave rectifiers. The resultants circuit will be

🚀 Solve in Practice Mode

📖 Explanation

For $(V_{\in} \gt 0 )$ , $P\rightarrow V_{01}=negative$ $Q\rightarrow V_{02}=0$ $V_0$ will be positive due to inverting action. For $(V_{\in} \lt 0)$ , $P\rightarrow V'_{01}=0$ $Q\rightarrow V'_{02}=positive$ $V_0$ will be positive due to non-inverting action. So, output is always rectified.

Q43GATE 2007MCQ

The circuit shown in the figure is

🚀 Solve in Practice Mode

📖 Explanation

It behaves as current source because the output current $I_o$ depends upon ( $V_{\in}$ ) and resistance only. Where, $I_0=\frac{\left ( \frac{V \times R_2}{R_1+R_2} \right )}{r}=\frac{R_2}{R_1+R_2}\cdot \frac{V}{r}$

Q44GATE 2006MCQ

For a given sinusoidal input voltage, the voltage waveform at point P of the clamper circuit shown in figure will be

🚀 Solve in Practice Mode

📖 Explanation

For -ve half of the input +ve terminal of OPAMP is at higher potential than -ve terminal and output goes to $+V_{sat}$ but due to this high potential diode gets on and restricts the output to 0.7V only. And for +ve half of the input +ve terminal of OPAMP is at lower potential than -ve terminal's potential and output goes to $-V_{sat}$ and remains at $-V_{sat}$ .

Q45GATE 2006MCQ

A relaxation oscillator is made using OPAMP as shown in figure. The supply voltages of the OPAMP are $\pm$ 12 V. The voltage waveform at point P will be

🚀 Solve in Practice Mode

📖 Explanation

Output will be either at $+V_{sat}$ or $-V_{sat}$ . When output will be at $+V_{sat}$ diodde connected to $10k\Omega$ resistance will be on making voltage at point P equal to 6V. When output will be at $-V_{sat}$ diodde connected to $2k\Omega$ resistance will be on making voltage at point P equal to -10V.

Q46GATE 2005MCQ

Consider the inverting amplifier, using an ideal operational amplifier shown in the figure. The designer wishes to realize the input resistance seen by the smallsignal source to be as large as possible, while keeping the voltage gain between -10 and -25. The upper limit on $R_{F}$ is 1 M $\Omega$ . The value of $R_{1}$ should be

🚀 Solve in Practice Mode

📖 Explanation

$\frac{V_o}{V_{\in}}=-\frac{R_f}{R_1}$ If gain=-25 then $R_1=\frac{1000k}{25}=40k\Omega$ If gain=-10 then $R_1=\frac{1000k}{10}=100k\Omega$ Soif we keep $R_1$ to be $100k\Omega$ then we never get the gain -25 for any $R_F$ so we can keep $R_1$ to be $40k\Omega$ .

Q47GATE 2005MCQ

In the given figure, if the input is a sinusoidal signal, the output will appear as shown

🚀 Solve in Practice Mode

📖 Explanation

Output will be at its saturation values and it is having a phase difference of ( $180^{\circ}$ ). For +ve half of the input, first diode will be on making -ve terminal of op-amp to 0.7V larger than the voltage at +ve input, so output will be $-V_{sat}$ . For -ve half of the input reverse of the above will happen and output will go $+V_{sat}$ .

Q48GATE 2004MCQ

The input resistance $R_{IN} = \frac{V_{x}}{I_{x}}$ of the circuit in figure is

🚀 Solve in Practice Mode

📖 Explanation

Here, $I_x=\frac{V_x-V_y}{R_3}$ But, $V_y=\left ( 1+\frac{100K}{10K} \right )V_x=11V_x$ $I_x=\frac{-10V_x}{1M\Omega }$ $\Rightarrow \frac{V_x}{I_x}=-100k\Omega$

Q49GATE 2004MCQ

In the active filter circuit shown in figure, if Q=1, a pair of poles will be realized with $\omega _0$ equal to

🚀 Solve in Practice Mode

Q50GATE 2003MCQ

For the circuit of figure with an ideal operational amplifier, the maximum phase shift of the output $V_{out}$ with reference to the input $V_{\in}$ is

🚀 Solve in Practice Mode

📖 Explanation

$V_{(+)}=\frac{V_{\in} \times \frac{1}{jC\omega }}{R+\frac{1}{jC\omega }}=\frac{V_{\in}}{1+jRC\omega}$ where, $V_{(-)}=V_{(+)}$ [For ideal Op-amp] $\frac{V_{\in}-V_{(-)}}{R_1}=\frac{V_{(-)}-V_{o}}{R_1}$ $V_o=2V_{(-)}-V_{\in}=2V_{(+)}-V_{\in} \;\;\;\;(V_{(-)}=V_{(+)})$ $=\left ( \frac{2}{1+j\omega RC}-1 \right )V_{\in}$ $=\left ( \frac{1-j\omega RC}{1-j\omega RC} \right )V_{\in}$ $\angle \left ( \frac{V_o}{V_{\in}} \right )=-2 tan^{-1}\omega RC$ For $-90^{\circ} \leq\theta \leq 90^{\circ}$ , maximum phase shift occurs $(+180^{\circ}).$

Q51GATE 2003MCQ

Assuming the operational amplifier to be ideal, the gain $V_{out}/V_{\in}$ for the circuit shown in figure is

🚀 Solve in Practice Mode

📖 Explanation

using KCL at node 1, we have, $\frac{V_1-0}{10}+\frac{V_1}{1}+\frac{V_1-V_{out}}{10}=0$ $12V_1=V_{out}\;\;\;....(i)$ Also, using KCL at inverting node, we get $\frac{V_{\in}-0}{1}=\frac{0-V_1}{10}$ $V_1=-V_{\in} \times 10 \;\;\;....(ii)$ From equation (i) and (ii), we get $\frac{V_{out}}{V_{\in}}=-120$

Q52GATE 2001MCQ

An op-amp, having a slew rate of 62.8 V/ $\mu sec$ , is connected in a voltage follower configuration. If the maximum amplitude of the input sinusoid is 10V, then the minimum frequency at which the slew rate limited distortion would set in at the output is

🚀 Solve in Practice Mode

📖 Explanation

$S.R.=\omega V_m$ $62.8V/\mu s=2 \pi f \times 10$ $f=\frac{62.8 \times 10^6 }{2 \pi \times 10}=1 MHz$